{"title":"Lateral gate suspended-body carbon nanotube field-effect-transistors with sub-100nm air gap by precise positioning method","authors":"Ji Cao, A. Ionescu","doi":"10.1109/DRC.2011.5994482","DOIUrl":null,"url":null,"abstract":"Carbon nanotubes (CNTs) have been intensively studied for nanoelectromechanical systems (NEMS) applications owing to their remarkable electrical and mechanical properties. Efforts have been made in single-walled CNT field-effect transistor (SWCNTFET) based ultrasensitive mass detection, radio-frequency (RF) signal processing, etc [1]. However, current techniques of manipulating CNTs (including: in-situ CNT growth and post-synthesis fabrication) often precludes bottom-up integration with pre-existing complementary metal-oxide-semiconductor (CMOS) circuits [2], due to: high process temperature, lack of self-alignment accuracy, etc.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"69th Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2011.5994482","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Carbon nanotubes (CNTs) have been intensively studied for nanoelectromechanical systems (NEMS) applications owing to their remarkable electrical and mechanical properties. Efforts have been made in single-walled CNT field-effect transistor (SWCNTFET) based ultrasensitive mass detection, radio-frequency (RF) signal processing, etc [1]. However, current techniques of manipulating CNTs (including: in-situ CNT growth and post-synthesis fabrication) often precludes bottom-up integration with pre-existing complementary metal-oxide-semiconductor (CMOS) circuits [2], due to: high process temperature, lack of self-alignment accuracy, etc.