{"title":"An SIMO Step-Down Converter with Coupled Inductor","authors":"Yi-Chieh Hsu, Jing-Yuan Lin, Chii-Hwa Wang, Sz-Wei Chou","doi":"10.1109/VLSI-DAT49148.2020.9196435","DOIUrl":null,"url":null,"abstract":"Power management IC have been widely used, and due to the development of the process, the number of transistors on the same area has grown, resulting in more sets of output requirements. The single-inductor multi-output power converter not only meets the requirements of multiple sets of voltages today, but also greatly reduces the area and cost of the system. This thesis uses a single-coupled inductor to achieve multiple output. The chip is implemented in TSMC 0.35 $\\mu$m2P4M CMOS process, and the internal control circuit and power transistor and PADs have a die area of 1. 69975$\\times$ 3.78275mm2. The input voltage range is 4.5$\\sim $5.5 V and the first output voltage is 1.2 V, the second output voltage is 1.8 V, and the external power stage coupled inductor and capacitor are 2 $\\mu$H and 330 $\\mu$F respectively.","PeriodicalId":235460,"journal":{"name":"2020 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI-DAT49148.2020.9196435","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Power management IC have been widely used, and due to the development of the process, the number of transistors on the same area has grown, resulting in more sets of output requirements. The single-inductor multi-output power converter not only meets the requirements of multiple sets of voltages today, but also greatly reduces the area and cost of the system. This thesis uses a single-coupled inductor to achieve multiple output. The chip is implemented in TSMC 0.35 $\mu$m2P4M CMOS process, and the internal control circuit and power transistor and PADs have a die area of 1. 69975$\times$ 3.78275mm2. The input voltage range is 4.5$\sim $5.5 V and the first output voltage is 1.2 V, the second output voltage is 1.8 V, and the external power stage coupled inductor and capacitor are 2 $\mu$H and 330 $\mu$F respectively.