Harmonie innovatios in semiconductor devices and computer architectures toward post “Moore-era”

Abstract

Simple 2D scaling of semiconductor devices by “Moore's law” will not work well soon to improve the performances and power efficiencies due to tight physical directional limits. System integrations, however, might continue to advance further by 3D structural evolutions either in monolithic on-chip integrations or heterogeneous off-chip stacks. Accelerated implementations of new architectures and new functional materials would be key factors, especially to execute machine learnings more efficiently for ΑΙ-based smart applications. Just now, we have established SDRJ (The System Device Roadmap Committee of Japan, https://www.sdrj.jp/) in JSAP collaborated with IEEE IRDS (International Roadmap for Devices and Systems, http://irds.ieee.org/) to discuss the roadmaps internationally toward the year of 2030.