Efficient algorithm for functional scheduling in hardware/software co-design

W. Jigang, T. Srikanthan, Tao Jiao
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引用次数: 1

Abstract

Task scheduling is one of the crucial steps during functional hardware/software co-design. Due to the possibly concurrent execution of the tasks implemented in hardware, the NP-hard scheduling problem becomes more difficult to solve optimally. In this paper an efficient algorithm is proposed for task scheduling in functional hadware/software co-design. The proposed algorithm assigns the priority for each task combining the information both in the communication penalty and the hardware-only critical path, to enhance the parallelism of the tasks. A large body of experimental results confirm that the proposed algorithm is superior to the most widely used approaches first-come first-schedule(FCFS) and level-by-level schedule (LBLS) in hardware/software scheduling, both for random graphs and some realistic application graphs, without large increase in running time. The improvement over FCFS and LBLS is up to 10% for some random graphs, and it is more significant for FFT application graphs, according to the simulation results on the same types of graphs (under the same assumptions) as in the literature where LBLS is employed
硬件/软件协同设计中高效的功能调度算法
任务调度是功能软硬件协同设计的关键步骤之一。由于在硬件中实现的任务可能并发执行,NP-hard调度问题变得更加难以最优解决。本文提出了一种高效的软硬件协同设计任务调度算法。该算法结合通信惩罚信息和纯硬件关键路径信息为每个任务分配优先级,以提高任务的并行性。大量的实验结果表明,该算法在硬件/软件调度方面优于最常用的先到先调度(FCFS)和逐级调度(LBLS)方法,无论对于随机图还是一些实际应用图,都不会增加大量的运行时间。根据与文献中使用LBLS的相同类型的图(在相同的假设下)的仿真结果,对于某些随机图,相对于FCFS和LBLS的改进可达10%,并且对于FFT应用图的改进更为显著
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