{"title":"A 0.9-GHz fully integrated 45% PAE class-Ε power amplifier fabricated using a 0.18-μm CMOS process for LoRa applications","authors":"Yu-Ting Tseng, Jeng-Rern Yang","doi":"10.23919/SNW.2017.8242325","DOIUrl":null,"url":null,"abstract":"A 0.9-GHz fully integrated class-E two-stage power amplifier (PA) for Long Range Wide Area Networks (LoRaWANs) is fabricated using a TSMC 0.18-μm process. This PA employs multiple methods to realize a high efficiency. The injection-locking technique is used to reduce the input driving power. The first stage is utilized as the driver stage to improve the efficiency and decrease the number of inductors used for input and interstage matching. Furthermore, the use of a self-biasing technique could enhance the output power and power added efficiency (PAE). The fully integrated PA can achieve a 19.03-dBm output power for a 50-Ω load with a 45.1% PAE and 29.35-dB power gain.","PeriodicalId":424135,"journal":{"name":"2017 Silicon Nanoelectronics Workshop (SNW)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Silicon Nanoelectronics Workshop (SNW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/SNW.2017.8242325","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A 0.9-GHz fully integrated class-E two-stage power amplifier (PA) for Long Range Wide Area Networks (LoRaWANs) is fabricated using a TSMC 0.18-μm process. This PA employs multiple methods to realize a high efficiency. The injection-locking technique is used to reduce the input driving power. The first stage is utilized as the driver stage to improve the efficiency and decrease the number of inductors used for input and interstage matching. Furthermore, the use of a self-biasing technique could enhance the output power and power added efficiency (PAE). The fully integrated PA can achieve a 19.03-dBm output power for a 50-Ω load with a 45.1% PAE and 29.35-dB power gain.