K. Samsudin, B. Cheng, A. R. Brown, S. Roy, A. Asenov
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引用次数: 1
Abstract
The CMOS scaling increases the impact of intrinsic parameter fluctuation on the yield and functionality of SRAM. A statistical circuit simulation framework which can fully capture intrinsic parameter fluctuation information into the compact model has been developed. The impact of discrete random dopants in the source and drain regions on 6T SRAM cells has been investigated for well scaled ultra thin body (UTB) SOI MOSFETs with physical channel length in the range of 10nm to 5nm.