A Genetic Programming based approach for efficiently exploring architectural communication design space of MPSoCs

Abstract

New integrated circuits technologies and the demand for more complex applications have created Multi-Processor System-on-Chip (MPSoC). MPSoC is a complex integrated circuit, which can be composed of microprocessors, buses, memories and others computational system components. As the number and variety of components of today's MPSoC is increasing, its communication architecture is becoming a limiting factor for applications performance and power consumption. Thus, techniques have been created for exploring the design space in order to find out the best communication architecture for a given application. Such techniques, however, are either inaccurate (by using static analysis based approaches) or very time consuming since each communication configuration of the design space must be simulated (by using simulation models) or estimated (using mixed approaches). This paper presents a new approach to explore the design space of bus-based communication architectures of MPSoCs using Generalized Linear Models and Genetic Programming. By using the proposed approach, some experiments show that it was possible to explore a subset of the design space and to identify the best communication configuration for a given application reducing 90% of the exploration time with less of 3,8% mean global error.