III-V Heterostucture Transistor with Underlap: A Comparitive Study and Performance Investigation

Abstract

MOSFET performs better in high-performance mixed signal applications due to the higher electron mobility caused by the presence of InGaAs in the channel. The numerical TCAD device simulator is used in this study to perform the first Analog/RF analysis of an Inversion-type Enhancement Mode InGaAs Channel.RF performance testing becomes a significant issue in analogue and radio frequency circuit-based applications due to its nonlinearity properties. Recently, heterostructure underlap double gate MOSFETs have shown promise for use in various digital circuits. Devices with underlap architecture perform better as a result of lower coupling capacitance between the contacts (Source-Gate and Gate-Drain). This study verifies a variety of performance indicators, including the transconductance generation factor (TGF), the transconductance (gm), the linearity factor such as 2nd and 3rd order variable intercept and the cut off frequency (fT). There has been a comparison with Junctionless DG MOSFET. The outcomes demonstrate that Heterostucture Underlap DGMOSFET is a powerful competitive device for SOC application with improved RF performance.