Hiroaki Kato, Kenya Kobayashi, Toshifumi Nishiguchi, Saya Shimomura
{"title":"Process Control Technique to Reduce Wafer Warpage for Trench Field Plate Power MOSFET","authors":"Hiroaki Kato, Kenya Kobayashi, Toshifumi Nishiguchi, Saya Shimomura","doi":"10.1109/ISSM.2018.8651148","DOIUrl":null,"url":null,"abstract":"Field-Plate (FP) MOSFET structure has field-plate and thick oxide inside each trench. Due to the field-plate effect, it can improve tradeoff between low drift layer resistance and high breakdown voltage. In this structure, wafer warpage is larger than that of conventional structure. It causes various problems, for example an error in vacuum adsorption or wafer handling. We predicted the warpage change in a newly designed FP-MOSFET by TCAD simulation, and studied the reason of the warpage peculiar to FP-MOSFET. Moreover, we made a countermeasure in some critical process steps, and controlled the wafer warpage until the end of process.","PeriodicalId":262428,"journal":{"name":"2018 International Symposium on Semiconductor Manufacturing (ISSM)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Symposium on Semiconductor Manufacturing (ISSM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSM.2018.8651148","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Field-Plate (FP) MOSFET structure has field-plate and thick oxide inside each trench. Due to the field-plate effect, it can improve tradeoff between low drift layer resistance and high breakdown voltage. In this structure, wafer warpage is larger than that of conventional structure. It causes various problems, for example an error in vacuum adsorption or wafer handling. We predicted the warpage change in a newly designed FP-MOSFET by TCAD simulation, and studied the reason of the warpage peculiar to FP-MOSFET. Moreover, we made a countermeasure in some critical process steps, and controlled the wafer warpage until the end of process.