D. Garroux, M. Ouaknine, I. J. Malik, T. Fukada, M. Odera, T. Ishigaki, T. Ueda, W. Yoo
{"title":"Titanium Silicide Formation: Process Characterization Using Single Wafer Rapid Thermal Furnace System","authors":"D. Garroux, M. Ouaknine, I. J. Malik, T. Fukada, M. Odera, T. Ishigaki, T. Ueda, W. Yoo","doi":"10.1109/RTP.2006.368009","DOIUrl":null,"url":null,"abstract":"Formation of titanium silicide was studied using a \"hot wall\" single wafer rapid thermal furnace (SRTF) system. Average sheet resistance and uniformity of TiSi2 films before and after processing, as well as process repeatability were evaluated. We also collected data for annealing of implanted wafers, oxide thickness & uniformity before and after dry and wet oxidation. We use this data to demonstrate process repeatability for anneals in the SRTF system. Comparison with wafers processed with Altis Semiconductor tool of record (TOR) gave some useful information regarding differences between wafers processed in lamp-based RTA and SRTF systems","PeriodicalId":114586,"journal":{"name":"2006 14th IEEE International Conference on Advanced Thermal Processing of Semiconductors","volume":"112 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 14th IEEE International Conference on Advanced Thermal Processing of Semiconductors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RTP.2006.368009","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Formation of titanium silicide was studied using a "hot wall" single wafer rapid thermal furnace (SRTF) system. Average sheet resistance and uniformity of TiSi2 films before and after processing, as well as process repeatability were evaluated. We also collected data for annealing of implanted wafers, oxide thickness & uniformity before and after dry and wet oxidation. We use this data to demonstrate process repeatability for anneals in the SRTF system. Comparison with wafers processed with Altis Semiconductor tool of record (TOR) gave some useful information regarding differences between wafers processed in lamp-based RTA and SRTF systems