Novel Mode Changing Features in the Design of Quaternary Logic Gates using CNTFET

Anisha Paul, B. Pradhan
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Abstract

This paper introduces novel mode changing features in quaternary logic gates like Inverter, NAND and NOR gates using CNTFET. Different designs of these gates are already present in the literature, but in this paper, all four types of quaternary logic gates [Standard Quaternary (SQ), Positive Quaternary (PQ), Negative Quaternary (NQ) and Intermediate Quaternary (IQ) type] are combined together in a single structure and the final output produces any one of the four types depending on some select signals. Introducing these new features into the design increases the versatility and broadens the area of application of these circuits. This paper also proposes a power-efficient quaternary minimum (QMIN) and maximum (QMAX) circuit with a lower number of CNTFETs as compared to the existing designs. The proposed circuits are simulated in HSPICE with Stanford University’s 32nm CNTFET model, and in each instance, average power values and propagation delays are duly noted.
利用CNTFET设计四元逻辑门的新模式变化特征
本文介绍了利用CNTFET在逆变器、NAND门、NOR门等四元逻辑门中新颖的换模特性。这些门的不同设计已经出现在文献中,但在本文中,所有四种类型的四元逻辑门[标准四元(SQ),正四元(PQ),负四元(NQ)和中间四元(IQ)类型]被组合在一个单一的结构中,最终输出根据一些选择的信号产生四种类型中的任何一种。在设计中引入这些新功能增加了这些电路的多功能性并拓宽了应用领域。本文还提出了一种低功耗的四元最小(QMIN)和最大(QMAX)电路,与现有设计相比,该电路具有更少的cntfet数量。采用斯坦福大学的32nm CNTFET模型在HSPICE中对所提出的电路进行了仿真,并在每个实例中适当地记录了平均功率值和传播延迟。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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