{"title":"Novel Mode Changing Features in the Design of Quaternary Logic Gates using CNTFET","authors":"Anisha Paul, B. Pradhan","doi":"10.1109/EDKCON56221.2022.10032859","DOIUrl":null,"url":null,"abstract":"This paper introduces novel mode changing features in quaternary logic gates like Inverter, NAND and NOR gates using CNTFET. Different designs of these gates are already present in the literature, but in this paper, all four types of quaternary logic gates [Standard Quaternary (SQ), Positive Quaternary (PQ), Negative Quaternary (NQ) and Intermediate Quaternary (IQ) type] are combined together in a single structure and the final output produces any one of the four types depending on some select signals. Introducing these new features into the design increases the versatility and broadens the area of application of these circuits. This paper also proposes a power-efficient quaternary minimum (QMIN) and maximum (QMAX) circuit with a lower number of CNTFETs as compared to the existing designs. The proposed circuits are simulated in HSPICE with Stanford University’s 32nm CNTFET model, and in each instance, average power values and propagation delays are duly noted.","PeriodicalId":296883,"journal":{"name":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDKCON56221.2022.10032859","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper introduces novel mode changing features in quaternary logic gates like Inverter, NAND and NOR gates using CNTFET. Different designs of these gates are already present in the literature, but in this paper, all four types of quaternary logic gates [Standard Quaternary (SQ), Positive Quaternary (PQ), Negative Quaternary (NQ) and Intermediate Quaternary (IQ) type] are combined together in a single structure and the final output produces any one of the four types depending on some select signals. Introducing these new features into the design increases the versatility and broadens the area of application of these circuits. This paper also proposes a power-efficient quaternary minimum (QMIN) and maximum (QMAX) circuit with a lower number of CNTFETs as compared to the existing designs. The proposed circuits are simulated in HSPICE with Stanford University’s 32nm CNTFET model, and in each instance, average power values and propagation delays are duly noted.