A semi-digital delay-locked loop with infinite phase capture range and excellent linearity

Yi Ding, Xi Duan, Jiandong Zang, Xianjie Wan, Jun Liu, Weidong Yang
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Abstract

This paper describes a high linearity and high resolution semi-digital delay-locked loop (DLL) architecture using a multiphase generator and a phase rotator to get infinite phase capture range, in the meanwhile using current interpolation to obtain high linearity and high resolution. The multiphase generator generates quadrature clocks for the phase rotator instead of a delay line. Thus the phase capture range will change with the changing of input clock rate. An infinite phase capture range can be achieved. The current interpolation is used to eliminate the drawbacks of quadrature phase mixing. The results of simulation show that this semi-digital DLL architecture exhibits 7 picosecond resolution and high linearity at 1.25GHz.
半数字锁相环,具有无限相位捕获范围和良好的线性
本文介绍了一种高线性度、高分辨率的半数字锁相环(DLL)结构,利用多相发生器和相位旋转器来获得无限相位捕获范围,同时利用电流插值来获得高线性度和高分辨率。多相发生器为相位旋转器产生正交时钟,而不是延迟线。因此相位捕获范围将随着输入时钟速率的变化而变化。可以实现无限相位捕获范围。采用电流插值法消除了正交相位混频的弊端。仿真结果表明,该半数字DLL结构在1.25GHz频段具有7皮秒的分辨率和高线性度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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