Yi Ding, Xi Duan, Jiandong Zang, Xianjie Wan, Jun Liu, Weidong Yang
{"title":"A semi-digital delay-locked loop with infinite phase capture range and excellent linearity","authors":"Yi Ding, Xi Duan, Jiandong Zang, Xianjie Wan, Jun Liu, Weidong Yang","doi":"10.1109/INEC.2016.7589271","DOIUrl":null,"url":null,"abstract":"This paper describes a high linearity and high resolution semi-digital delay-locked loop (DLL) architecture using a multiphase generator and a phase rotator to get infinite phase capture range, in the meanwhile using current interpolation to obtain high linearity and high resolution. The multiphase generator generates quadrature clocks for the phase rotator instead of a delay line. Thus the phase capture range will change with the changing of input clock rate. An infinite phase capture range can be achieved. The current interpolation is used to eliminate the drawbacks of quadrature phase mixing. The results of simulation show that this semi-digital DLL architecture exhibits 7 picosecond resolution and high linearity at 1.25GHz.","PeriodicalId":416565,"journal":{"name":"2016 IEEE International Nanoelectronics Conference (INEC)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Nanoelectronics Conference (INEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INEC.2016.7589271","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper describes a high linearity and high resolution semi-digital delay-locked loop (DLL) architecture using a multiphase generator and a phase rotator to get infinite phase capture range, in the meanwhile using current interpolation to obtain high linearity and high resolution. The multiphase generator generates quadrature clocks for the phase rotator instead of a delay line. Thus the phase capture range will change with the changing of input clock rate. An infinite phase capture range can be achieved. The current interpolation is used to eliminate the drawbacks of quadrature phase mixing. The results of simulation show that this semi-digital DLL architecture exhibits 7 picosecond resolution and high linearity at 1.25GHz.