J. Vial, A. Bosio, P. Girard, C. Landrault, S. Pravossoudovitch, A. Virazel
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引用次数: 8
Abstract
With the technology entering the nano dimension, manufacturing processes are less and less reliable, thus drastically impacting the yield. A possible solution to alleviate this problem in the future could consist in using fault tolerant architectures to tolerate manufacturing defects. In this paper, we analyze the conditions that make the use of a classical triple modular redundancy (TMR) architecture interesting for a yield improvement purpose.