Millimeter (mm)-wave wireless NoC as interconnection backbone for multicore chips: promises and challenges

P. Pande
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Abstract

The continuing progress and integration levels in silicon technologies make complete end-user systems on a single chip possible. This massive level of integration makes modern multi-core chips all pervasive in domains ranging from weather forecasting, astronomical data analysis, and biological applications to consumer electronics and smart phones. NoCs have emerged as communication backbones to enable a high degree of integration in multi-core SoCs. Despite their advantages, an important performance limitation in traditional NoCs arises from planar metal interconnect-based multi-hop communications, wherein the data transfer between far-apart blocks causes high latency and power consumption. The latency, power consumption, and interconnect routing problems of NoCs can be simultaneously addressed by replacing multi-hop wired paths with high-bandwidth single-hop long-range wireless links. Recent investigations have established that the silicon integrated on-chip antenna operating in the millimeter wave range of a few tens to one hundred GHz is now a viable technology. Coupled with significant advances in mm-wave transceiver design, this opens up new opportunities for detailed investigations into wireless NoCs (WiNoCs). This talk will present methodologies and challenges for designing WiNoC architectures.
毫米波无线NoC作为多核芯片的互连骨干:承诺与挑战
硅技术的不断进步和集成化水平使得在单个芯片上完成最终用户系统成为可能。这种大规模的集成使得现代多核芯片无处不在,从天气预报、天文数据分析、生物应用到消费电子产品和智能手机。noc已经成为通信骨干,可以在多核soc中实现高度集成。尽管它们具有优势,但传统noc的一个重要性能限制来自基于平面金属互连的多跳通信,其中远距离块之间的数据传输导致高延迟和功耗。通过用高带宽单跳远程无线链路取代多跳有线路径,可以同时解决noc的延迟、功耗和互连路由问题。最近的调查已经确定,在几十到100千兆赫的毫米波范围内工作的硅集成片上天线现在是一种可行的技术。再加上毫米波收发器设计的重大进步,这为无线noc (WiNoCs)的详细研究开辟了新的机会。本演讲将介绍WiNoC架构设计的方法和挑战。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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