{"title":"Analysis and modeling of DMOS FBSOA limited by n-p-n leakage diffusion current","authors":"M. Denison, M. Pfost, M. Stecher, D. Silber","doi":"10.1109/ISPSD.2005.1488018","DOIUrl":null,"url":null,"abstract":"Failure of DMOS self-heated in saturation below the avalanche threshold is usually related to an activation of the parasitic n-p-n transistor. In this work we show that the exponential increase of the leakage diffusion current of the n-p-n is sufficient to cause thermal runaway, even for a slightly reverse body-source bias caused by the internal ballasting source resistance. Adding this current contribution to a basic DMOS compact model allows simulating the thermal limit of large DMOS transistors considered as distributed electrothermal networks. To our knowledge it is the first report of a quantitative DMOS FBSOA model accounting for the instabilities driven by the temperature dependences of both MOS and n-p-n components","PeriodicalId":154808,"journal":{"name":"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.","volume":"6 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2005.1488018","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
Failure of DMOS self-heated in saturation below the avalanche threshold is usually related to an activation of the parasitic n-p-n transistor. In this work we show that the exponential increase of the leakage diffusion current of the n-p-n is sufficient to cause thermal runaway, even for a slightly reverse body-source bias caused by the internal ballasting source resistance. Adding this current contribution to a basic DMOS compact model allows simulating the thermal limit of large DMOS transistors considered as distributed electrothermal networks. To our knowledge it is the first report of a quantitative DMOS FBSOA model accounting for the instabilities driven by the temperature dependences of both MOS and n-p-n components