An Area-Efficient Deblocking Filter Architecture for Multi-standard Video Codec

Abstract

Video needs to be compressed before transmission or storage, and the continuous development of video coding standards has brought about the need for multi-standard video codecs. Deblocking filter is an important tool to improve the efficiency of video coding in both the H.264 Advanced Video Coding (H.264/AVC) standard and the High Efficiency Video Coding (HEVC) standard. To support these two standards, this paper proposes an area-efficient general deblocking filter hardware architecture. The proposed architecture reuses similar parts in the filter to control the increased area cost of supporting multiple standards and achieves a 37% gate count reduction. And by switching the connection form of filter modules between series and parallel, a good trade-off is made between throughput and area. The architecture has a throughput of 8K@60fps in H.264/AVC and 8K@160fps in HEVC. The experimental result shows that the multi-standard architecture consumes 61.3k gates at 526 MHz in GF 28 nm process, and the design has been successfully integrated into a multi-standard video codec.