{"title":"Design of an FPGA based adaptive neural controller for intelligent robot navigation","authors":"M. Azhar, K. Dimond","doi":"10.1109/DSD.2002.1115380","DOIUrl":null,"url":null,"abstract":"This article describes an alternative hardware solution to be implemented on FPGAs (field programmable gate array) for collision free robot navigation. A RAM based artificial neural network (ANN) was considered as the heart of the controller due to the advantage of its ease of implementation in conventional hardware. The structure of the ANN was well suited to realize the experiments for evolutionary robotics (ER). The hardware implementation gives massive parallelism of neural networks and the FPGA allows fast IC prototyping and low cost modifications.","PeriodicalId":330609,"journal":{"name":"Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"26","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DSD.2002.1115380","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 26
Abstract
This article describes an alternative hardware solution to be implemented on FPGAs (field programmable gate array) for collision free robot navigation. A RAM based artificial neural network (ANN) was considered as the heart of the controller due to the advantage of its ease of implementation in conventional hardware. The structure of the ANN was well suited to realize the experiments for evolutionary robotics (ER). The hardware implementation gives massive parallelism of neural networks and the FPGA allows fast IC prototyping and low cost modifications.