High reliability assembly of chip scale packages

Abstract

Ball Grid Array (BGA) packages with 1.27 mm pitch arrays are now being extended to fine pitch BGAs, or Chip Scale Packages (CSP) with ball diameters of 0.3 mm and array pitches as small as 0.5 mm. The current work analyzes the impact of integrating such packages into a high volume SMT assembly line and examines the impact of process and board variables on the reliability of the total assembly. The CSP chosen for the current study was a 0.75 mm pitch CSP scheduled to replace the 0.5 mm lead pitch Thin Small Outline Package (TSOP) currently used in high volume, small form factor, flash memory products. The CSP dimensions of approximately 5.6 mm by 7.4 mm represents an 80% reduction in package area compared to the traditional TSOP, with a footprint of 12 mm by 20 mm. The study examines the effect of solder paste printing parameters, flux-only assembly, and printed circuit board surface finishes such as immersion gold and solder-leveling. Solder paste volume measurements were made on over 2800 individual CSP pads during the builds using an in-line, automated laser scanning profilometer. Reliability test vehicles were assembled using CSPs, TSOPs and other surface mount components, prior to performing accelerated thermal cycling tests from 0/spl deg/C to 100/spl deg/C, and 40/spl deg/C to 85/spl deg/C. CSP placements were performed using optimized high speed chip placers to place CSPs at rates of up to 5 parts per second. Interim reliability test results after four months of testing are presented with a discussion of TSOP versus MicroBGA package construction.