Y. Liu, K. Endo, M. Masahara, E. Sugimata, T. Matsukawa, K. Ishii, H. Yamauchi, T. Shimizu, K. Sakamoto, S. O'Uchi, T. Sekigawa, E. Suzuki
{"title":"Advanced FinFET technology: TiN metal-gate CMOS and 3T/4T device integration","authors":"Y. Liu, K. Endo, M. Masahara, E. Sugimata, T. Matsukawa, K. Ishii, H. Yamauchi, T. Shimizu, K. Sakamoto, S. O'Uchi, T. Sekigawa, E. Suzuki","doi":"10.1109/SOI.2005.1563594","DOIUrl":null,"url":null,"abstract":"As advanced FinFET technologies, we have developed the co-integration techniques of the TiN gated high-performance 3T- and flexible V/sub th/ 4T-FinFETs. By using the conventional reactive sputtering of TiN, the well symmetrical V/sub th/ N- and P-channel 3T-FinFETs and the high V/sub th/-controllable 4T-FinFETs using the resist etch-back process have been demonstrated. The developed technologies are attractive to materialize the high-performance and power-managed FinFET CMOS circuits.","PeriodicalId":116606,"journal":{"name":"2005 IEEE International SOI Conference Proceedings","volume":"209 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE International SOI Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.2005.1563594","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
As advanced FinFET technologies, we have developed the co-integration techniques of the TiN gated high-performance 3T- and flexible V/sub th/ 4T-FinFETs. By using the conventional reactive sputtering of TiN, the well symmetrical V/sub th/ N- and P-channel 3T-FinFETs and the high V/sub th/-controllable 4T-FinFETs using the resist etch-back process have been demonstrated. The developed technologies are attractive to materialize the high-performance and power-managed FinFET CMOS circuits.