{"title":"Pulse width multiplier circuit with application to digital phase measurements","authors":"M. A. El-Ela, A. Telba","doi":"10.1109/NRSC.1999.760885","DOIUrl":null,"url":null,"abstract":"A digital, frequency independent, phase meter is discussed. Wide frequency range of operation is obtained by using a digital pulse width multiplier to multiply the pulse width of the phase comparator output, (S-R flip flop for example). The clock pulses to be counted will be then the reference input signal instead of conventional crystal controlled oscillator clock sources-the elimination of the PLL used to multiply the clock frequency makes it possible to operate without the limit of the PLL lock-in range. Another advantage is simplicity and elimination of gating error.","PeriodicalId":250544,"journal":{"name":"Proceedings of the Sixteenth National Radio Science Conference. NRSC'99 (IEEE Cat. No.99EX249)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Sixteenth National Radio Science Conference. NRSC'99 (IEEE Cat. No.99EX249)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NRSC.1999.760885","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A digital, frequency independent, phase meter is discussed. Wide frequency range of operation is obtained by using a digital pulse width multiplier to multiply the pulse width of the phase comparator output, (S-R flip flop for example). The clock pulses to be counted will be then the reference input signal instead of conventional crystal controlled oscillator clock sources-the elimination of the PLL used to multiply the clock frequency makes it possible to operate without the limit of the PLL lock-in range. Another advantage is simplicity and elimination of gating error.