Low-cost ceramic thin-film ball grid arrays

M. Panicker, N. L. Greenman, J. Forster, P. Johnston
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引用次数: 2

Abstract

Ball grid array (BGA) is emerging as the next significant surface-mount package. This paper describes a simply structured, cost-effective ceramic BGA substrate, which conforms to current JEDEC registrations for flip-chip connections, as an alternative to multilayer co-fired ceramic BGA's. The BGA, processed on VIA/PLANE, a ceramic wafer with hermetic, tungsten-copper vias, uses a thin-film deposition technique, Enhanced Ion Plating (EIP). Controlled-Collapse Chip Connection (C4), solder-bumped flip chips are typically full or partial arrays of 5 mil solder bumps on 10 mil centers. This BGA transforms the C4 density to 35 mil bumps on 50 mil centers, much more compatible with current surface-mount assembly practices. The use of VIA/PLANE maintains the time-proven reliability of C4 on ceramic, and the flatness characteristics of VIA/PLANE eminently complement C4 and BGA technologies.<>
低成本陶瓷薄膜球栅阵列
球栅阵列(BGA)正在成为下一个重要的表面贴装封装。本文描述了一种结构简单,具有成本效益的陶瓷BGA衬底,它符合当前用于倒装芯片连接的JEDEC注册,作为多层共烧陶瓷BGA的替代品。BGA在VIA/PLANE(一种具有钨铜密封过孔的陶瓷晶圆)上加工,采用薄膜沉积技术,增强离子镀(EIP)。可控塌缩芯片连接(C4),凸焊倒装芯片通常是在10密耳中心上的5密耳凸焊的全部或部分阵列。这种BGA将C4密度转换为35mil的凸点和50mil的中心,与当前的表面贴装组装实践更加兼容。VIA/PLANE的使用保持了C4在陶瓷上久经考验的可靠性,VIA/PLANE的平整度特性显著地补充了C4和BGA技术。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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