Introduction to fixed-point multiplication and signal processing application

Abstract

The contribution deals with a binary representation of integer and real numbers. In domain of digital signal processing the number representation is either in fixed-point or floating-point form. In the text the algorithm for unsigned binary multiplication for fixed-point representation is presented. There are many processors with fixed or floating-point representation and there are also several blocks used for arithmetical operations in FPGA. But generally these blocks do not have a large variability in terms of bit width. The goal of the contribution is mainly to present an arithmetical model and to evaluate its complexity for a large number of possible implemented algorithms. For testing of product algorithm the multidimensional convolution of gray scale images was performed as well.