Low loss and small SiP for DC-DC converters

Abstract

This paper presents a SiP (system in package) that integrates high-side and low-side MOSFETs and a driver IC. The developed SiP has been realized the smallest mount area and lowest loss of DC-DC converter compared with the conventional devices that have ever been reported. Low-inductance packaging technology and optimization of the MOSFETs and driver IC by the MCM method (MCM: mixed simulation of circuit and MOS-power-devices), reduce the mount area by 60% smaller and reduce the loss by 25% compared with conventional discrete devices, when Vin=12 V, Vout=1.3 V, Iout=25 A, f=1 MHz.