Field Programmable Gate Array based elliptic curve Menezes-Qu-Vanstone key agreement protocol realization using Physical Unclonable Function and true random number generator primitives

IF 1 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC
N. Nalla Anandakumar, Mohammad S. Hashmi, Somitra Kumar Sanadhya
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引用次数: 5

Abstract

The trust, authenticity and integrity of Internet-of-Things (IoT) systems are heavily reliant on Physical Unclonable Functions (PUFs) and True random number generators (TRNGs). The PUF and TRNG produce device intrinsic digital signatures and random binary sequences, which are used for cryptographic key generation, key agreement/exchange, device authentication, cloning prevention etc. This article reports an efficient Field Programmable Gate Array (FPGA)-based realization of elliptic curve Menezes-Qu-Vanstone (ECMQV)-authenticated key agreement protocol using PUF and TRNG with very competitive area-throughput trade-offs. The key agreement protocols, which establish a shared secret key between two IoT devices, make use of PUF and TRNG primitives for the long- and short-term secret keys generation while the elliptic curve is employed for public key generated from the corresponding secret key. The performance of the protocol is investigated on FPGAs. The authors' implementation of the ECMQV protocol takes 1.802 ms using 18852 slices on Artix-7 FPGA.

Abstract Image

利用物理不可克隆函数和真随机数生成原语实现基于现场可编程门阵列的椭圆曲线menedez - qu - vanstone密钥协议
物联网(IoT)系统的信任、真实性和完整性在很大程度上依赖于物理不可克隆功能(puf)和真随机数生成器(trng)。PUF和TRNG生成设备固有数字签名和随机二进制序列,用于加密密钥生成、密钥协议/交换、设备认证、防克隆等。本文报道了一种高效的基于现场可编程门阵列(FPGA)的椭圆曲线Menezes-Qu-Vanstone (ECMQV)认证密钥协议的实现,该协议使用PUF和TRNG,具有非常有竞争力的区域吞吐量权衡。密钥协议在两个物联网设备之间建立共享密钥,使用PUF和TRNG原语生成长期密钥和短期密钥,使用椭圆曲线生成相应密钥生成的公钥。在fpga上研究了该协议的性能。作者在Artix-7 FPGA上使用18852片实现ECMQV协议,耗时1.802 ms。
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来源期刊
Iet Circuits Devices & Systems
Iet Circuits Devices & Systems 工程技术-工程:电子与电气
CiteScore
3.80
自引率
7.70%
发文量
32
审稿时长
3 months
期刊介绍: IET Circuits, Devices & Systems covers the following topics: Circuit theory and design, circuit analysis and simulation, computer aided design Filters (analogue and switched capacitor) Circuit implementations, cells and architectures for integration including VLSI Testability, fault tolerant design, minimisation of circuits and CAD for VLSI Novel or improved electronic devices for both traditional and emerging technologies including nanoelectronics and MEMs Device and process characterisation, device parameter extraction schemes Mathematics of circuits and systems theory Test and measurement techniques involving electronic circuits, circuits for industrial applications, sensors and transducers
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