Back-end defect localization for 28nm FPGA

Abstract

This paper presents two case studies, which are based on 28nm Field Programmable Logic Array (FPGA) bulk silicon technology, to highlight the novel approach on locating back-end interconnects and metallization defect by utilizing local software, which are Interconnect Test Generation (ITG) debugger and Functional Interface, then follow by extensive layout study, suspected defect node identification, parallel lapping and Scanning Emission Microscope (SEM) inspection.