Reliability evaluation of power VDMOSFET

Abstract

The specific application of power devices has imposed the requirement for intensive investigation of their reliability. In this paper we have investigated the reliability and failure mechanism of power VDMOS. In constant-stress accelerated life test, the three different temperatures (150°C, 165°C and 180°C) are imposed on the devices. Under the bias VDS=7.5V, IDS=0.8A, and the channel temperature T=117°C, the average lifetime is 3.67×106 h , the activation energy E is 0.54eV, and the main failure mechanism is gate damage.