THESIS: the hardware environment for small intelligent systems, for engineering applications

K. F. Wong, G.G. Coghill, J. Hannah
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引用次数: 3

Abstract

System size, lack of standards and poor real time response have prevented the widespread acceptance of AI techniques in engineering applications. By tailoring the hardware configuration specifically for applications and by utilising an accepted bus standard, improved performance may be achieved. In this paper, the above approach is justified through the explanation of the principles of a hardware system, named The Hardware Environment for Small Intelligent Systems (THESIS) which is currently under development in Edinburgh University.
论文:小型智能系统的硬件环境,用于工程应用
系统规模大、缺乏标准和较差的实时响应阻碍了人工智能技术在工程应用中的广泛接受。通过专门为应用程序定制硬件配置,并利用公认的总线标准,可以实现改进的性能。在本文中,通过解释硬件系统的原理来证明上述方法是合理的,该硬件系统名为小型智能系统的硬件环境(THESIS),目前正在爱丁堡大学开发中。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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