Cascade FinFET Direct Coupled Amplifier with Power Efficient Technique

Abstract

This paper presents cascade amplifier with parametric variation using CMOS technology which can be stimulated at lower technology node. Amplifiers used for high frequency operations and higher bandwidth designed by BJT technology undergoes various limitations like small scale integration, power consumption and high frequency operation. CMOS Technology has an edge over BJT in various terms like low power dissipation, large-scale integration and high speed. This paper reflects the advantages of using MOSFET Technology for direct coupled common emitter followed by common base amplifier where we try to apply parametric variations in the proposed work which directly reduces the leakage current and hence power consumption in CMOS Technology. This research depicts trusted changes in power consumption for CMOS based cascade amplifier as compared to conventional cascade amplifier. The research paper also shows high performance by changing “w/l” ratio as a process parameter for a particular Technology node. In this paper, chip variations and environmental variation including FinFET Technology are taken into account with material properties to reduce the power consumption of cascade amplifier in the standby mode. The proposed work has several applications in high frequency amplifier design where parameters associated with amplifier can be improved by parametric variation and proposed FinFET based amplifier design.