A reliable and cost-effective assembly process for quick prototyping with GaN FETs and other flip-chip packages

Abstract

As transistors rapidly move to smaller packages, reliable prototyping becomes increasingly difficult. Ideally, high accuracy placement machines are preferred for device placement but are not practical for low-volume production. Here, a novel manual assembly process is applied to the 400 μm pitch EPC GaN FETs that has resulted in near 100% yield and exceptional reliability. The process requires a soldering iron and a reflow oven. An X-Ray image is preferred to verify alignment, but a successful alternate method is also presented. This assembly process, which can be applied to other flip chip and chip-scale packaging, will save time and resources in the development of new products employing wide bandgap power devices like EPC GaN FETs, and it has delivered significantly greater yield than alternative published methods.