A post-package bit-repair scheme using static latches with bipolar-voltage programmable antifuse circuit for high-density DRAMs

J. Wee, K. Min, Jong-Tai Park, Sang-Pil Lee, Young-Hee Kim, Tae-Heum Yang, J. Joo, Jin-Yong Chung
{"title":"A post-package bit-repair scheme using static latches with bipolar-voltage programmable antifuse circuit for high-density DRAMs","authors":"J. Wee, K. Min, Jong-Tai Park, Sang-Pil Lee, Young-Hee Kim, Tae-Heum Yang, J. Joo, Jin-Yong Chung","doi":"10.1109/VLSIC.2001.934197","DOIUrl":null,"url":null,"abstract":"The antifuse programming voltages are changed into bipolar voltages of V/sub CC/ and -V/sub CC/, alleviating high-voltage problems such as permanent device breakdown and achieving a smaller layout area for the antifuse circuit than the previous scheme. In addition, an efficient bit-repair scheme is used instead of the conventional line-repair one, reducing a layout area for the redundancy bits. Using the static latches instead of the dynamic memory cells for the redundancy bits eliminates possible defects in the redundancy area, making this bit-repair scheme robust. The yield improvement using the post-package repair reaches as much as 3% for 0.16 /spl mu/m 256 M SDRAM.","PeriodicalId":346869,"journal":{"name":"2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2001.934197","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14

Abstract

The antifuse programming voltages are changed into bipolar voltages of V/sub CC/ and -V/sub CC/, alleviating high-voltage problems such as permanent device breakdown and achieving a smaller layout area for the antifuse circuit than the previous scheme. In addition, an efficient bit-repair scheme is used instead of the conventional line-repair one, reducing a layout area for the redundancy bits. Using the static latches instead of the dynamic memory cells for the redundancy bits eliminates possible defects in the redundancy area, making this bit-repair scheme robust. The yield improvement using the post-package repair reaches as much as 3% for 0.16 /spl mu/m 256 M SDRAM.
采用静态锁存器和双极电压可编程防熔丝电路的高密度dram封装后位修复方案
将反熔丝编程电压转换为V/sub CC/和-V/sub CC/双极电压,缓解了永久性器件击穿等高压问题,实现了比原方案更小的反熔丝电路布局面积。此外,采用了一种有效的位修复方案代替传统的线路修复方案,减少了冗余位的布局面积。使用静态锁存器代替动态存储单元来存储冗余位,消除了冗余区域可能存在的缺陷,使该位修复方案具有鲁棒性。对于0.16 /spl mu/m的256 m SDRAM,使用封装后修复的产量提高可达3%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信