L. Xiao, B. You, Xiangming Sun, Guangming Huang, P. Yang, Dongliang Zhang, W. Ren
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引用次数: 2
Abstract
We present the readout and data transmission of a MAPS prototype MIC4 for the R&D of the CEPC vertex detector. A new data-driven readout architecture is implemented to achieve high spatial resolution, fast readout, and low power consumption. MIC4 contains a matrix of 128 rows by 64 columns with a pixel pitch of 25 μm. By a periphery priority encoder circuit and a data readout and framing circuit, MIC4 readouts data real time without on-chip memory. An 8B10B encoder, a 10:1 serializer, and an LVDS driver are implemented to transmit serially the data at 1.2 Gbps.