Wavelength-Routed Optical Networks-on-Chip: Design Methods and Tools to Bridge the Gap Between Logic Topologies and Physical Ones in 3D Architectures

Abstract

Silicon photonics is gaining momentum as a candidate technology platform for future intra- and inter-chip communications. However, its industrial uptake depends not only on technology maturity, but also on the capability to bridge the abstraction gap between technology developers and system designers. This paper presents an early-stage cross-layer refinement methodology of wavelength-routed optical network-on-chip topologies, linking logic topology synthesis to the physical implementation steps.