{"title":"Ultra-low power circuit design using double-gate FinFETs","authors":"G. Devi Tejashwini, I. B. K. Raju, G. Chary","doi":"10.1109/ICDCSYST.2014.6926194","DOIUrl":null,"url":null,"abstract":"In this paper, the design and performance of basic Digital (AND, OR, NAND, NOR, XOR, XNOR, NOT, Half-Adder) and Analog (Current Mirror, Cascode Current Mirror, Comparator) circuits using 20nm FinFET technology has presented. 20nm FinFET technology has been used for improvement in performance and for optimizing power mainly in Analog circuits. In this work, for different widths of NMOS and PMOS and low voltages, better results of power performance is observed in both digital and analog circuits using FinFET technology.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICDCSYST.2014.6926194","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In this paper, the design and performance of basic Digital (AND, OR, NAND, NOR, XOR, XNOR, NOT, Half-Adder) and Analog (Current Mirror, Cascode Current Mirror, Comparator) circuits using 20nm FinFET technology has presented. 20nm FinFET technology has been used for improvement in performance and for optimizing power mainly in Analog circuits. In this work, for different widths of NMOS and PMOS and low voltages, better results of power performance is observed in both digital and analog circuits using FinFET technology.