In-line defect density targets for new technology from development to manufacturing

Abstract

IC manufacturers continuously shrink device dimensions, in order to gain more value from the silicon. Pushing old technologies to the limits is part of the shrinkage path. One of the key questions to be answered is how low must the in-line defect density be at the various stages of development to ensure an economic, robust, and timely transfer to manufacturing. This paper discusses one solution to this question.