Process and device technologies of topological-switching random-access memory (TRAM)

Abstract

The process and device technologies of “topological-switching RAM” (TRAM) were investigated. The sputtering and dry etching of GeTe/Sb2Te3 superlattice were developed as 300-mm-wafer processes. Fabrication and analyses of one-resistor and one-transistor one-resistor micro test structures revealed the electrical properties that were different from conventional phase change memory (PRAM).