Reducing pipeline energy demands with local DVS and dynamic retiming

Seokwoo Lee, Shidhartha Das, Toan Pham, T. Austin, D. Blaauw, T. Mudge
{"title":"Reducing pipeline energy demands with local DVS and dynamic retiming","authors":"Seokwoo Lee, Shidhartha Das, Toan Pham, T. Austin, D. Blaauw, T. Mudge","doi":"10.1145/1013235.1013313","DOIUrl":null,"url":null,"abstract":"The quadratic relationship between voltage and energy has made dynamic voltage scaling (DVS) one of the most powerful techniques to reduce system power demands. Recently, techniques such as Razor DVS, voltage overscaling, and intelligent energy management have emerged as approaches to further reduce voltage by eliminating costly voltage margins inserted into traditional designs to ensure always-correct operation. The degree to which a global voltage controller can shave voltage margins is limited by imbalances in pipeline stage latency. Since all pipeline stages share the same voltage, the stage exercising the longest critical path will define the overall voltage of the system, even if other stages could potentially run at lower voltages. In this paper, we evaluate two local tuning mechanisms in the context of Razor DVS, a local voltage controller scheme that allows each pipeline stage its own voltage level, and a lower cost dynamic retiming scheme that incorporates per-stage clock delay elements to allow longer-latency pipeline stages to \"borrow\" time from shorter-latency stages. Using simulation, we draw two key insights from our study. First, mitigating pipeline stage imbalances render additional DVS energy savings. A Razor pipeline design with dynamic retiming finds an additional 12% energy savings over global voltage control (resulting in overall energy savings of more than 28% compared to fully-margined DVS). Second, we demonstrate that imbalances arise not only from design factors, but also from run-time characteristics. As the program (or program phase) changes, we see different logic paths in multiple stages exercised frequently, necessitating a dynamic fine-tuning of local control. This result suggests that even well-balanced pipelines could benefit from dynamic retiming.","PeriodicalId":120002,"journal":{"name":"Proceedings of the 2004 International Symposium on Low Power Electronics and Design (IEEE Cat. No.04TH8758)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2004-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"36","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2004 International Symposium on Low Power Electronics and Design (IEEE Cat. No.04TH8758)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1013235.1013313","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 36

Abstract

The quadratic relationship between voltage and energy has made dynamic voltage scaling (DVS) one of the most powerful techniques to reduce system power demands. Recently, techniques such as Razor DVS, voltage overscaling, and intelligent energy management have emerged as approaches to further reduce voltage by eliminating costly voltage margins inserted into traditional designs to ensure always-correct operation. The degree to which a global voltage controller can shave voltage margins is limited by imbalances in pipeline stage latency. Since all pipeline stages share the same voltage, the stage exercising the longest critical path will define the overall voltage of the system, even if other stages could potentially run at lower voltages. In this paper, we evaluate two local tuning mechanisms in the context of Razor DVS, a local voltage controller scheme that allows each pipeline stage its own voltage level, and a lower cost dynamic retiming scheme that incorporates per-stage clock delay elements to allow longer-latency pipeline stages to "borrow" time from shorter-latency stages. Using simulation, we draw two key insights from our study. First, mitigating pipeline stage imbalances render additional DVS energy savings. A Razor pipeline design with dynamic retiming finds an additional 12% energy savings over global voltage control (resulting in overall energy savings of more than 28% compared to fully-margined DVS). Second, we demonstrate that imbalances arise not only from design factors, but also from run-time characteristics. As the program (or program phase) changes, we see different logic paths in multiple stages exercised frequently, necessitating a dynamic fine-tuning of local control. This result suggests that even well-balanced pipelines could benefit from dynamic retiming.
利用局部DVS和动态重定时降低管道能量需求
电压与能量之间的二次关系使动态电压缩放(DVS)成为降低系统功率需求的最有效技术之一。最近,诸如Razor分布式交换机、电压过刻度和智能能量管理等技术已经出现,通过消除插入传统设计中的昂贵电压余量来进一步降低电压,以确保始终正确运行。全局电压控制器可以削减电压余量的程度受到管道阶段延迟的不平衡的限制。由于所有管道级共享相同的电压,即使其他级可能在较低的电压下运行,行使最长关键路径的级也将定义系统的总体电压。在本文中,我们评估了Razor分布式交换机背景下的两种本地调谐机制,一种是允许每个管道阶段拥有自己的电压水平的本地电压控制器方案,另一种是成本较低的动态重定时方案,该方案包含每级时钟延迟元素,允许较长延迟的管道阶段从较短延迟的阶段“借用”时间。通过模拟,我们从研究中得出了两个关键的见解。首先,减轻管道级不平衡可以节省额外的DVS能源。采用动态重定时的Razor管道设计,可以比全局电压控制额外节省12%的能源(与全边际分布式交换机相比,总体节能超过28%)。其次,我们证明不平衡不仅来自设计因素,也来自运行时特征。随着程序(或程序阶段)的变化,我们看到不同的逻辑路径在多个阶段频繁运行,需要对局部控制进行动态微调。这一结果表明,即使是平衡良好的管道也可以从动态重定时中受益。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信