Savita Kashyap, R. Pandey, Jaya Madan, Rajnish Sharma
{"title":"Silicide on Oxide Based Carrier Selective Front Contact for 24% Efficient PERC Solar Cell","authors":"Savita Kashyap, R. Pandey, Jaya Madan, Rajnish Sharma","doi":"10.1109/VLSIDCS53788.2022.9811447","DOIUrl":null,"url":null,"abstract":"Passivated emitter rear contact (PERC) based solar cells are currently regarded as a strong contender for large production in the photovoltaic (PV) industry owing to its superior light absorption properties. However, feasible fabrication of PERC devices with minimum contact recombination loss is a challenging task. Therefore, to diminish this factor, poly-silicon on oxide (POLO) as a carrier selective contact is employed in PERC device and processed through Silvaco-TCAD tool. In this proposed work, the concept of silicide electrostatically doped (ED) has been adopted to avoid the need for actual physical doping in polysilicon (poly-Si) layer on the front surface. Also, the impact of three different metal silicides such as ErSi0.25 (3 eV), ErSi0.82 (3.75 eV) and YbSi2 (3.95 eV) to induce the n-type ED region has been studied and analyzed. The overall performance of the PERC device is investigated with the help of PV parameters, EBD, current-density (J-V) curve and EQE. ED-POLO PERC solar cell reflects higher PV parameters such as short circuit current density (JSC) of 40.86 mA/cm2, open-circuit voltage (VOC) of 0.728 V, fill-factor (FF) of 80.76% and power conversion efficiency (PCE) of 24.02% at optimized silicide WF of 3 eV. The reported work of silicide in carrier selective contact-based PERC device may open a path to enhance the device performance.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIDCS53788.2022.9811447","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
Passivated emitter rear contact (PERC) based solar cells are currently regarded as a strong contender for large production in the photovoltaic (PV) industry owing to its superior light absorption properties. However, feasible fabrication of PERC devices with minimum contact recombination loss is a challenging task. Therefore, to diminish this factor, poly-silicon on oxide (POLO) as a carrier selective contact is employed in PERC device and processed through Silvaco-TCAD tool. In this proposed work, the concept of silicide electrostatically doped (ED) has been adopted to avoid the need for actual physical doping in polysilicon (poly-Si) layer on the front surface. Also, the impact of three different metal silicides such as ErSi0.25 (3 eV), ErSi0.82 (3.75 eV) and YbSi2 (3.95 eV) to induce the n-type ED region has been studied and analyzed. The overall performance of the PERC device is investigated with the help of PV parameters, EBD, current-density (J-V) curve and EQE. ED-POLO PERC solar cell reflects higher PV parameters such as short circuit current density (JSC) of 40.86 mA/cm2, open-circuit voltage (VOC) of 0.728 V, fill-factor (FF) of 80.76% and power conversion efficiency (PCE) of 24.02% at optimized silicide WF of 3 eV. The reported work of silicide in carrier selective contact-based PERC device may open a path to enhance the device performance.