{"title":"Self-aligned recessed source/drain ultra-thin body SOI MOSFET technology","authors":"Zhikuan Zhang, S. Zhang, M. Chan","doi":"10.1109/ESSDER.2004.1356549","DOIUrl":null,"url":null,"abstract":"In this work, a self-aligned recessed source/drain (ReS/D) ultra-thin body (UTB) SOI MOS technology is proposed and demonstrated. The thick diffusion regions of the ReS/D are placed on a recessed trench, which is patterned on the buried oxide and go under the SOI film. The new structure reduces the parasitic source/drain resistance without increasing the gate-to-drain Miller capacitance, which is the major advantage over the elevated source/drain structure. The scalability of the UTB MOSFETs and the larger design window due to reduced parasitics are demonstrated. Fabrication details and experimental results are presented.","PeriodicalId":287103,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDER.2004.1356549","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this work, a self-aligned recessed source/drain (ReS/D) ultra-thin body (UTB) SOI MOS technology is proposed and demonstrated. The thick diffusion regions of the ReS/D are placed on a recessed trench, which is patterned on the buried oxide and go under the SOI film. The new structure reduces the parasitic source/drain resistance without increasing the gate-to-drain Miller capacitance, which is the major advantage over the elevated source/drain structure. The scalability of the UTB MOSFETs and the larger design window due to reduced parasitics are demonstrated. Fabrication details and experimental results are presented.
在这项工作中,提出并演示了一种自对准嵌入式源/漏(ReS/D)超薄体(UTB) SOI MOS技术。ReS/D的厚扩散区被放置在一个凹陷的沟槽上,该沟槽在埋藏的氧化物上形成图案,并在SOI膜下。新结构降低了寄生源漏电阻,而不增加栅极-漏极米勒电容,这是与高架源漏结构相比的主要优势。证明了UTB mosfet的可扩展性和由于减少寄生而产生的更大的设计窗口。给出了制作细节和实验结果。