Georges Quénot, I. Kraljic, Jocelyn Serot, Bertrand Zavidovique
{"title":"A reconfigurable compute engine for real-time vision automata prototyping","authors":"Georges Quénot, I. Kraljic, Jocelyn Serot, Bertrand Zavidovique","doi":"10.1109/FPGA.1994.315605","DOIUrl":null,"url":null,"abstract":"Describes a reconfigurable computer engine called the Data-Flow Functional Computer (DFFC), which is dedicated to rapid prototyping of real-time vision automata. The computer consists of a regular 3D array of very coarse grain application-specific FPGAs, called the 'field-programmable operator array' (FPOA). Each FPOA includes two configurable data paths and ten input/output ports. Specific development tools allow easy and efficient use of the computer. A high-level description (in a functional language) is compiled into a DFFC configuration using an operator library. Several significant applications (connected component labelling, nonlinear filtering, coloured object tracking) have been implemented using our tools. An environment for automatic derivation of vision automata from a DFFC configuration is currently under development.<<ETX>>","PeriodicalId":138179,"journal":{"name":"Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"38","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FPGA.1994.315605","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 38
Abstract
Describes a reconfigurable computer engine called the Data-Flow Functional Computer (DFFC), which is dedicated to rapid prototyping of real-time vision automata. The computer consists of a regular 3D array of very coarse grain application-specific FPGAs, called the 'field-programmable operator array' (FPOA). Each FPOA includes two configurable data paths and ten input/output ports. Specific development tools allow easy and efficient use of the computer. A high-level description (in a functional language) is compiled into a DFFC configuration using an operator library. Several significant applications (connected component labelling, nonlinear filtering, coloured object tracking) have been implemented using our tools. An environment for automatic derivation of vision automata from a DFFC configuration is currently under development.<>