{"title":"An ultra-low-power digitally programmable gain amplifier for biological applications","authors":"M. Kumngern, U. Torteanchai","doi":"10.1109/CIRCUITSANDSYSTEMS.2013.6671623","DOIUrl":null,"url":null,"abstract":"This paper presents an ultra-low-power digitally programmable gain amplifier for biological signal processing applications. To achieve low-power consumption, the MOS transistor operating in weak inversion region is used. The circuit is constituted by a class-AB current amplifier which can handle wide input signal. The gain of digitally programmable gain amplifier can be maintained by using digital signal levels. The proposed circuit is simulated using 0.5 μm CMOS process from MOSIS. The proposed circuit consumes 44.3 nW from ±1.2 V power supply. The programmable gain varies linearity from 0 to 16 dB through a 3-bit digital signal while achieves the total harmonic distortion -36.7 dB.","PeriodicalId":436232,"journal":{"name":"2013 IEEE International Conference on Circuits and Systems (ICCAS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Conference on Circuits and Systems (ICCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CIRCUITSANDSYSTEMS.2013.6671623","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper presents an ultra-low-power digitally programmable gain amplifier for biological signal processing applications. To achieve low-power consumption, the MOS transistor operating in weak inversion region is used. The circuit is constituted by a class-AB current amplifier which can handle wide input signal. The gain of digitally programmable gain amplifier can be maintained by using digital signal levels. The proposed circuit is simulated using 0.5 μm CMOS process from MOSIS. The proposed circuit consumes 44.3 nW from ±1.2 V power supply. The programmable gain varies linearity from 0 to 16 dB through a 3-bit digital signal while achieves the total harmonic distortion -36.7 dB.