Data Transfer Methods in FPGA Based Embedded Design for High Speed Data Processing Systems

Abstract

In modern data processing systems where large amount of data needs to be processed in order to achieve its designated performance, the use of hardware accelerators becomes mandatory. Every FPGA manufacturer proposes its unique method of transferring data between embedded processors (e.g. Picoblaze, Microblaze, Nios, PowerPC, ARM Cortex) and hardware peripheral made from FPGA's reconfigurable resources or high speed dedicated communication modules. These hardware peripherals can perform a lot of different functionalities, like cryptographic and multimedia accelerators or digital signal coprocessors. This paper presents the design and implementation of several data busses along with its associated communication protocols that interconnects embedded processors and cryptographic hardware accelerator. At the end of this paper the implementation results are compared to provide developers the information needed to choose the right method to transfer data in new designs.