Generating hardware from OpenMP programs

Y. Y. Leow, C. Ng, W. Wong
{"title":"Generating hardware from OpenMP programs","authors":"Y. Y. Leow, C. Ng, W. Wong","doi":"10.1109/FPT.2006.270297","DOIUrl":null,"url":null,"abstract":"Various high level hardware description languages have been invented for the purpose of improving the productivity in the generation of customized hardware. Most of these languages are variants, usually parallel versions, of popular software programming languages. In this paper, we describe our effort to generate hardware from OpenMP, a software parallel programming paradigm that is widely used and tested. We are able to generate FPGA hardware from OpenMP C programs via synthesizable VHDL and Handel-C. We believe that the addition of this medium-grain parallel programming paradigm will bring additional value to the repertoire of hardware description languages","PeriodicalId":354940,"journal":{"name":"2006 IEEE International Conference on Field Programmable Technology","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"56","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Conference on Field Programmable Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FPT.2006.270297","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 56

Abstract

Various high level hardware description languages have been invented for the purpose of improving the productivity in the generation of customized hardware. Most of these languages are variants, usually parallel versions, of popular software programming languages. In this paper, we describe our effort to generate hardware from OpenMP, a software parallel programming paradigm that is widely used and tested. We are able to generate FPGA hardware from OpenMP C programs via synthesizable VHDL and Handel-C. We believe that the addition of this medium-grain parallel programming paradigm will bring additional value to the repertoire of hardware description languages
从OpenMP程序生成硬件
为了提高定制硬件生成的生产率,已经发明了各种高级硬件描述语言。这些语言大多是流行软件编程语言的变体,通常是并行版本。在本文中,我们描述了我们从OpenMP生成硬件的努力,OpenMP是一种广泛使用和测试的软件并行编程范例。通过可合成的VHDL和Handel-C,我们能够从OpenMP C程序生成FPGA硬件。我们相信,这种中等粒度并行编程范式的加入将为硬件描述语言带来额外的价值
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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