A new Hw/Sw co-design method for multiprocessor system on chip applications

Iulian Nita, V. Lazarescu, R. Constantinescu
{"title":"A new Hw/Sw co-design method for multiprocessor system on chip applications","authors":"Iulian Nita, V. Lazarescu, R. Constantinescu","doi":"10.1109/ISSCS.2009.5206089","DOIUrl":null,"url":null,"abstract":"Our goal in this paper is to simulate the behavior of multiprocessor system on chip. We used an open virtual platform - OVPSim made by Imperas Company, which offers the possibility of programming and running application on the platforms architectures. With this platform we simulated both hardware architectures and running software applications. We used two types of processors - ARM7 IP core and MIPS32 IP core, shared memory, local memory and BUS for interconnections and simulated three systems on chip models and for each architecture we simulated the running of the same applications.","PeriodicalId":277587,"journal":{"name":"2009 International Symposium on Signals, Circuits and Systems","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on Signals, Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCS.2009.5206089","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

Our goal in this paper is to simulate the behavior of multiprocessor system on chip. We used an open virtual platform - OVPSim made by Imperas Company, which offers the possibility of programming and running application on the platforms architectures. With this platform we simulated both hardware architectures and running software applications. We used two types of processors - ARM7 IP core and MIPS32 IP core, shared memory, local memory and BUS for interconnections and simulated three systems on chip models and for each architecture we simulated the running of the same applications.
片上多处理器系统的一种新的软硬件协同设计方法
本文的目标是在芯片上模拟多处理器系统的行为。我们使用了Imperas公司的开放式虚拟平台OVPSim,它提供了在平台架构上编程和运行应用程序的可能性。在这个平台上,我们模拟了硬件架构和运行的软件应用程序。我们使用两种类型的处理器- ARM7 IP核和MIPS32 IP核,共享内存,本地内存和总线进行互连,并模拟了三个系统芯片模型,对于每个架构,我们模拟了相同应用程序的运行。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信