Technology and design of SIPOS films used as field plates for high voltage planar devices

Abstract

In order to improve the voltage handling capability of high voltage and power devices, an efficient technique based on the deposition of a semi-resistive layer acting as a field plate is proposed. The complete design of a high voltage planar transistor (1500V) using a SIPOS layer on SiO2 film is extracted from bidimensional numerical simulations. The evolution of breakdown voltage BVcbo versus critical parameters as oxide thickness, field plate length and field plate-stop channel distance is calculated. A good agreement between theoretical and experimental results is obtained. The breakdown voltage achieved by the devices is near 90% of the ideal planar breakdown voltage without any damage for other electrical parameters.