Low-Power 3D-PCB Stacking System Design and Validation by Automatic Voltage-Current Scalable Technique

Abstract

The proposed design is integrating multiple video and power-regulate chips integrated with a low-power 3D-PCB Stacking system. This performance-power optimized 3D-PCB Stacking SoC system is corroborated by the dual multi-mode video decoder (MMVD) and five voltage-current adjustors (VCAs) chips. Low-power dual-Vdd design techniques are utilized in MMVD, without using level converters. The VCA is used to supply manageable power-current to MMVD. The automated voltage-current adjusted technique does not increase the additional silicon cost without using voltage converters. The low-power contribution is to utilize current-adjusted technique for an automation voltage-adjustor. A built-in voltage measurement provides voltage-level can be safely regulated.The system achieves a 32 $\sim$ 68% power reduction for two video decoders by using the VCAs. The system scalable function is implemented by a MorPack 3D-PCB stacking design. The proposed technique is success validated reduce system power consumption and without performance degradation.