A 50V input range 14bit 250kS/s ADC with 97.8dB SFDR and 80.2dB SNR

Abstract

A 50V input range, common-mode and differential, 14bit 2-step SAR ADC is presented. The ADC operating at 250kS/s for a 50VPP input signal on a 15V common-mode voltage achieves 97,8dB SFDR and 80:2dB SNR, while consuming 4.29mW from a single 3.3V supply. The 2-step architecture accomplishes an increase in resolution by reusing conversion residue, with a time-shared configurable amplifier/comparator block and SAR hardware. The high SFDR figure achieved without trimming, calibration or tuning asserts the linearity of the implemented high-voltage bootstrapped switch and the capacitive DAC array. The ADC provides an alternative, lower-power solution to high voltage data acquisition, by removing the need for off chip or silicon expensive components.