Jingren Gu, H. Yao, Keping Wang, B. Parviz, B. Otis
{"title":"A 10μA on-chip electrochemical impedance spectroscopy system for wearables/implantables","authors":"Jingren Gu, H. Yao, Keping Wang, B. Parviz, B. Otis","doi":"10.1109/ASSCC.2014.7008922","DOIUrl":null,"url":null,"abstract":"This work proposes a new time-domain integration method to realize Electrochemical Impedance Spectroscopy (EIS). Unlike traditional EIS systems which use a quadrature sinusoid stimulus, we propose a low-frequency, low-amplitude sinusoid stimulus, which is realized through a sinusoid DAC without the need for analog filter. The error caused by harmonic generation can be suppressed through integration in detection. The response current is sensed by a switched capacitor integrator with control synchronized with sinusoid DAC. The integration output is sampled and digitized by an 8-bit SAR ADC. The (1×1.1)mm2 prototype is fabricated in a 130nm CMOS process. It consumes 10μA from a 1.2V supply.","PeriodicalId":161031,"journal":{"name":"2014 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE Asian Solid-State Circuits Conference (A-SSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2014.7008922","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
This work proposes a new time-domain integration method to realize Electrochemical Impedance Spectroscopy (EIS). Unlike traditional EIS systems which use a quadrature sinusoid stimulus, we propose a low-frequency, low-amplitude sinusoid stimulus, which is realized through a sinusoid DAC without the need for analog filter. The error caused by harmonic generation can be suppressed through integration in detection. The response current is sensed by a switched capacitor integrator with control synchronized with sinusoid DAC. The integration output is sampled and digitized by an 8-bit SAR ADC. The (1×1.1)mm2 prototype is fabricated in a 130nm CMOS process. It consumes 10μA from a 1.2V supply.