K. Sakaguchi, K. Yanagita, H. Kurisu, H. Suzuki, K. Ohmi, T. Yonehara
{"title":"ELTRAN/sup (R)/ by water-jet splitting in stress-controlled porous Si","authors":"K. Sakaguchi, K. Yanagita, H. Kurisu, H. Suzuki, K. Ohmi, T. Yonehara","doi":"10.1109/SOI.1999.819877","DOIUrl":null,"url":null,"abstract":"The ELTRAN/sup (R)/ SOI wafer process (Yonehara et al, 1994) has effectively used porous Si in the epitaxial and etching processes. In addition, porous Si again plays the other significant role in cost reduction. If the bonded pairs are split at the porous Si layers and the wasted starting materials (device wafers) are reused for the next device wafers, the manufacturing cost can be dramatically reduced. The splitting technique was developed and demonstrated using double layered porous Si in conjunction with water jets. The mechanism of splitting was investigated from the viewpoint of the stress in porous Si. The dynamic stress configuration was observed and controlled for the splitting of double porous Si layers. By reusing the device wafers, three-cycled ELTRAN/sup (R)/ wafers were successfully fabricated from one device wafer. SOI quality was found not to be degraded by the device wafer reuse and to be comparable to that of the conventional process.","PeriodicalId":117832,"journal":{"name":"1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.1999.819877","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
The ELTRAN/sup (R)/ SOI wafer process (Yonehara et al, 1994) has effectively used porous Si in the epitaxial and etching processes. In addition, porous Si again plays the other significant role in cost reduction. If the bonded pairs are split at the porous Si layers and the wasted starting materials (device wafers) are reused for the next device wafers, the manufacturing cost can be dramatically reduced. The splitting technique was developed and demonstrated using double layered porous Si in conjunction with water jets. The mechanism of splitting was investigated from the viewpoint of the stress in porous Si. The dynamic stress configuration was observed and controlled for the splitting of double porous Si layers. By reusing the device wafers, three-cycled ELTRAN/sup (R)/ wafers were successfully fabricated from one device wafer. SOI quality was found not to be degraded by the device wafer reuse and to be comparable to that of the conventional process.
ELTRAN/sup (R)/ SOI晶圆工艺(Yonehara et al ., 1994)在外延和蚀刻工艺中有效地使用了多孔硅。此外,多孔硅在降低成本方面也起着重要作用。如果在多孔硅层上将键合对分开,并且浪费的起始材料(器件晶片)可以在下一个器件晶片中重复使用,则可以大大降低制造成本。利用双层多孔硅与水射流相结合,开发并演示了劈裂技术。从多孔硅的应力角度研究了其劈裂机理。观察并控制了双孔硅层劈裂时的动态应力分布。通过重复利用器件晶圆,成功地在一个器件晶圆上制备了三循环ELTRAN/sup (R)/晶圆。结果发现,该装置晶圆的重复使用不会降低SOI的质量,并可与传统工艺相媲美。