Low voltage organic thin-film transistor with reduced sub-gap DOS for power efficient logic circuits

Abstract

Circuit performance of low voltage organic thinfilm transistors (OTFTs) using two different approaches including enlarging the gate dielectric capacitance with large permittivity (high-k) gate dielectric material and reducing the sub-gap density-of-states (DOS) at the channel two different approaches were compared by device and circuit hybrid simulations. The simulation results show that low-voltage OTFTs with reduced sub-gap DOS strategy can help to achieve faster and more power efficient circuits.