PACE: a parallel VLSI extractor on the Intel hypercube multiprocessor

K. Belkhale, P. Banerjee
{"title":"PACE: a parallel VLSI extractor on the Intel hypercube multiprocessor","authors":"K. Belkhale, P. Banerjee","doi":"10.1109/ICCAD.1988.122521","DOIUrl":null,"url":null,"abstract":"Hypercube multiprocessors achieve a cost-effective and feasible approach to supercomputing by directly connecting a large number of low-cost processors with local memory, which cooperate on tasks by message-passing. An efficient parallel algorithm to speed up the VLSI circuit extraction task on a hypercube multiprocessor is proposed. The basic approach consists of partitioning of a circuit into smaller regions, assigning each region to a processor of the hypercube, and having the processors cooperate in performing the extraction procedures. The algorithm supports the use of different models for electrical parameter calculations of varying degrees of accuracy and computational complexity. The algorithm has been implemented in a program called PACE (parallel circuit extractor) on the Intel iPSC/D4-MX hypercube. Speedup results for the algorithm on many realistic VLSI circuits are presented.<<ETX>>","PeriodicalId":285078,"journal":{"name":"[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCAD.1988.122521","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

Hypercube multiprocessors achieve a cost-effective and feasible approach to supercomputing by directly connecting a large number of low-cost processors with local memory, which cooperate on tasks by message-passing. An efficient parallel algorithm to speed up the VLSI circuit extraction task on a hypercube multiprocessor is proposed. The basic approach consists of partitioning of a circuit into smaller regions, assigning each region to a processor of the hypercube, and having the processors cooperate in performing the extraction procedures. The algorithm supports the use of different models for electrical parameter calculations of varying degrees of accuracy and computational complexity. The algorithm has been implemented in a program called PACE (parallel circuit extractor) on the Intel iPSC/D4-MX hypercube. Speedup results for the algorithm on many realistic VLSI circuits are presented.<>
PACE: Intel超立方体多处理器上的并行VLSI提取器
Hypercube多处理器通过直接将大量低成本处理器与本地内存连接起来,实现了一种经济可行的超级计算方法,这些处理器通过消息传递在任务上进行协作。提出了一种在超立方体多处理器上加速VLSI电路提取任务的并行算法。基本方法包括将电路划分为更小的区域,将每个区域分配给超立方体的处理器,并让处理器合作执行提取过程。该算法支持使用不同的模型进行不同精度和计算复杂度的电参数计算。该算法已在Intel iPSC/D4-MX超立方体上的并行电路提取器(PACE)程序中实现。给出了该算法在许多实际VLSI电路上的加速结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信